Logic Analyser (part 2)

Last Updated or created 2025-04-15

So I got the PCBs.

Contact me if you want to have one.

Testing Cmos and TTL levels!

Working perfectly!

Improvements to be made:

  • OE (Output enable per 8 bits instead of one generic)
  • Design a case!

Below some screenshots. TTL and I2C cmos with decoding.

Spread the love

Leave a Reply

Your email address will not be published. Required fields are marked *