Last Updated or created 2022-09-07
Made a simulation of my new address decoder.
It uses a 74LS138 and a bunch of NAND gates.
You can safe using 4 NAND gates if you are not going to use split IO
| Address | ||
| 8000-FFFF | ROM | ROM |
| 7000-7FFF | Sound chip | SID |
| 6000-6FFF | Display + cursor | VIA1 |
| 5000-5FFF | Keymatrix | VIA2 |
| 4800-4FFF | split io | IO |
| 4000-47FF | split io | IO – ACIA |
| 0000-3FFF | Uses clock | RAM |
UPDATE: Found some 74LS139, so i could have changed some things around.
Try it over here: