The ATF22V10 is a Programmable Logic Device. This means you can program the logic in the chip.
Internally it looks like a big matrix of connections which you can program to connect/disconnect from certain logic.
It has just a bunch of inputs/outputs
So if we want to have a 7 Segment decoder (you can easily buy a BCD decoder .. but these only work for displaying 0-9 and not 0-9A-F for displaying HEX numbers)
7 Segment display
Binary IN
7 Segment decoded
Displays
D C B A
A B C D E F G
0 0 0 0
1 1 1 1 1 1 0
0
0 0 0 1
0 1 1 0 0 0 0
1
0 0 1 0
1 1 0 1 1 0 1
2
0 0 1 1
1 1 1 1 0 0 1
3
0 1 0 0
0 1 1 0 0 1 1
4
0 1 0 1
1 0 1 1 0 1 1
5
0 1 1 0
1 0 1 1 1 1 1
6
0 1 1 1
1 1 1 0 0 0 0
7
1 0 0 0
1 1 1 1 1 1 1
8
1 0 0 1
1 1 1 1 0 1 1
9
1 0 1 0
1 1 1 0 1 1 1
A
1 0 1 1
0 0 1 1 1 1 1
B
1 1 0 0
1 0 0 1 1 1 0
C
1 1 0 1
0 1 1 1 1 0 1
D
1 1 1 0
1 0 0 1 1 1 1
E
1 1 1 1
1 0 0 0 1 1 1
F
Now we see that segment A is 1 in the case of (0,2,3,5,6,7,8,9,A,C,E,F)
When programming the PLD we can write that as: (note / means inverted a plus is OR, and * is AND) So A is 0 in case of input being (1,4,B,D)
Made a simulation of my new address decoder. It uses a 74LS138 and a bunch of NAND gates. You can safe using 4 NAND gates if you are not going to use split IO
Address
8000-FFFF
ROM
ROM
7000-7FFF
Sound chip
SID
6000-6FFF
Display + cursor
VIA1
5000-5FFF
Keymatrix
VIA2
4800-4FFF
split io
IO
4000-47FF
split io
IO – ACIA
0000-3FFF
Uses clock
RAM
Above part is a single chip 74LS138
UPDATE: Found some 74LS139, so i could have changed some things around.
I found some stuff while sorting out some old computer stuff. Way back, when my Amiga was my main computer, i wanted to make my own version. A modular one.
So i started to segmentize the amiga, to put it on several exchangeable cards.
Eurocards are standardized prints 150mm x 100mm, mostly with a DIN41612 connector.
DIN41612
Eurocard example
When you make modules you can change/upgrade/test, you can have a very easy interchangeable system using a backplane like this
So i started planning those modules:
CPU – 68000 but upgradeable to 68030 or alike
Memory – With expansion
Sound
Video
More IO possibilities
Keyboard (see more at the bottom of this page)
I had a nice case which could hold a big backplane, custom powersupply. And a front panel containing drives, leds and knobs. (I know i have more info on this somewhere on my fileserver)
A nice example picture i found on danceswithferrets website
I never finished this project. I used Tech Manuals and print layouts to understand how things where done.
Part of schematic
I started to draw the modules like they where placed on the print on semi transparent (chalk)paper, the kind of paper that was used for electronic and mechanic diagrams.
TOP Part of printBottom part of printBoth on top of eachother
The last days i’ve been selling a lot of my old computers. They have been in my collection for many years, but now its time to part. Time for others to enjoy them.
(Instead of posting which ones are being sold and which i’ve still got on this page i’ll make another post)
I started collecting when i studied computer sciences. It’s a wonder my parents attic wasn’t collapsing. (They let me store many computers on their attic, let me run a mainframe in the house (previous post) and let me have computer-parties (pre-lan) in their home. (They even left, and gave me the space) .. 15+ teens with computers … there was a pingpong table in the livingroom (besides the other tables in the house ) For all computers.
Then i’ve got even more, when living on my own. (At some point about 140. )
A few years later i got rid of uninteresting computers (to my taste at that time) and incomplete ones. Then i filtered-out the non working.
Still leaving with a lot of computers, i kept these for many years.
Now i only want the ones i’ve worked with, or are special to me.
My first computer was a Commodore Vic-20. Friends had the popular C64. So i kept 2 of both. In Junior Technical School i’ve used the BBC Acorn a lot (Funny story below) My then friend Richard had a Atari ST, loads of fun we had with that machine, so i’m keeping a Atari 1040STf. Another friend used a Apple SE, so that one i also keep for now. I’ve been programming a lot on 80×86, the first dos PC’s, i’m still looking for a old machine (Laser XT) which i used way back then. But for now i’ve got a Sinclair PC200. I’ll keep a old Commodore PET 2001, because its cute. Besides having a cute PET, i’ve got a Holborn System. Made in Holland (Enschede), there are only a few left according to some sites: only 200 made! (Holborn means Holland Born) One of the inventors was from Holten, my birthplace. (Polak)
Putting the system together in 2018
At school we kept a list of everyone’s collection.
Soo .. the story about the BBC Acorn.
When i was at school outside study hours, i went to the computer lab. This was one classroom with about 16 BBC Acorns and a master (teacher station). When they saw how enthusiastic i was, i got the key to the classroom. I even got access to the master system. And after a little hacking i’ve gained access to the teachers files. There was a simple network system, i think it was called Econet. The teachers system was the only one with a disk station.
I liked the ‘highres’ line graphics you could make on the machines. (640×256) So i’ve wrote a lot of programs using this mode. I even wrote a program which drew a 3D robotarm on screen using wireframe graphics. At that time my mathematics scores where .. bad. Wasn’t interested i think. But drawing 3D robotic arms are not possible using mathematics, like using sinus, triangulary etcetera. So when my mathematics teacher saw my program, he didn’t believe me. So .. fooling around in the computer lab, i missed start of classes. And later on .. worse .. i almost was not allowed to do my final exams. I was late several times (and one of the first to leave, …. straight from and to the computer lab. )
I’ve got some programs printed on paper, i will use my leftover BBC Acorn (or a emulator) to capture some screen examples.
Sold stuff
UPDATE : Selling a lot, but i’ve bought some others between 2020-2023
SDK-85
Laser Xt/3
80386 DX
Also a “new” 1084 monitor (CRT for a Commodore 64) Now i have to look for a VGA Crt to get old vga-register manipulation programs working.
Above is my design for a hex keyboard to enter opcodes in hex using a simple monitor program. i used a 74ls922 which can decode a 4×4 matrix. I’d rather had a 74ls723 which can encode 20 keys.
Nowhere to be found. So i have to think of a new plan.
Now it is configured as follows:
C
D
E
F
8
9
A
B
4
5
6
7
0
1
2
3
When pressing the alternate key
addr (to implement)
run (1/2 implemented)
reset (to implement)
step instruction (to implement)
memory next
memory previous
PCB design for matrix hexboard with place for notes
Meanwhile i’ve ordered new keys (the ones i’ve been using for my photomanager project and wnat to have a setup like this:
?
?
addr
run
reset
C
D
E
F
?
8
9
A
B
step
4
5
6
7
mem next
0
1
2
3
mem prev
When you want to show the status of busses and alike, you can’t use a led and restistor directly on the bus, it will require too much current. So i’ve been using below schematic which uses a darlington array.
Now i can display databus, address bus and i’ve been using this for address decoding logic and hex keyboard.
I’ve implemented a second VIA chip, and ordered components to amplify the SID sound part
Above is my Kicad design (reverse engineering print below, which was made for my 6802CPU, which i could use to test the 6822 PIA) The 6822 is simular to 6502 in design. So i’m going to redo this for my 6502. The 7 segment displays are a start of hex-keyboard/display combo i’m going to post more of in the next days.
Below a part of the rom for the LCD dual line display.
Part of the ROM assembly code, top part is text (o.a. japanese)
Started to write routines which i can call to manipulate the display. Setting the pointer to a message, setting the line to use and a subset of controlls like: Center, Right, binary to ascii, scrolling, etcetera
lda #0 ; set line number
sta lineno ; store
jsr gotoline ; goto line in display
lda #<message ; get address from message and store for printline subroutine
sta messagestore
lda #>message
sta messagestore+1
jsr printline ; print
lda #1 ; set line number
sta lineno ; store
jsr gotoline
lda #<message2
sta messagestore
lda #>message2
sta messagestore+1
jsr printline
Above additions: New address decoder Below left the new graphical display, below right a test board which shows address lines and decoded chip-enable lines.
A15 high -> ROM A15 && A14 low -> RAM combination of A15 low and A14 high – A13 and A12 wil select peripherals.
Adress decoding
Start of a wirewrapped version
Above is a start of a wirewrapped version, i also started a PCB design in KIcad that will continuously be changed as i alter designs.
UPDATE SID Working! Using new address decoder.
SID = $7000
makesound:
lda #0
sta SID+$5 ; Channel1 - attack/decay
lda #250
sta SID+$6 ; Channel1 - Sustain/Release
lda #$95
sta SID+$0 ; Channel1 - Frequency low-byte
lda #$44
sta SID+$1 ; Channel1 - Frequency high-byte
lda #%00100001
sta SID+$4 ; SAW + Gate
lda #$0f
sta SID+$18 ; Volume max
For accessing the different components in computers you have to use the Address Bus. In most 8 bits computers there are 16 address lines.
The CPU on a 6502 can access 65536 addresses (16 bit ). But most chips in the circuit have just a few address lines. So the chip to use has to be selected using a CE (chip Enable) signal.
Old article i found on my fileserver from 1984
74 Series logic
Above example uses A15 combined with A14 to address the 16K ROM When using a 32k rom in the upper part of the memory, a15 can be used as CE
The 74ALS133 is a widely used decoder due to it’s many inputs.
Sometimes not all address lines are used for decoding, then you will get a repetition of the device in the memory map.
Above 6522 VIA has only 4 address lines RS0-RS3. But 2 chipselect pins (CS). If you connect the chip as below.
The chip would be selected when A15 is 1 and A14 is 0, A13-A04 it would not listen to. So its 4 bits addresses (total 16), would be repeated in a block $8000-$BFFF (10xx xxxx xxxx aaaa) 16384 addresses for 16 addresses on the 6522
ROM
Another simple solution to get a more precise address decoder without using a lot of components is using a ROM. But this wil only work for low speeds! A eeprom is relative cheap
Example ROM as chip enable/select
PAL PLA GAL
With these devices you can “program” a schematic which works as above example’s of the 74 series. But now you can do it using only one component.
PALs and PLAs are fuse-programmed, some are erasable like (e)eprom. Below a example of the code. Most of the PAL/PLA/GAL are hard to get and obsolete
;PALASM Design Description
;---------------------------------- Declaration Segment ------------
TITLE pRAM PC_interface Address Decoder
PATTERN pRAM97A.pds
REVISION H
AUTHOR Trevor Clarkson
COMPANY EEE KCL
DATE 30/05/97
CHIP decode PALCE20V8
;---------------------------------- PIN Declarations ---------------
PIN 1 AEN COMBINATORIAL ; INPUT
PIN 2 A9 COMBINATORIAL ; INPUT
PIN 3 A8 COMBINATORIAL ; INPUT
PIN 4 A7 COMBINATORIAL ; INPUT
PIN 5 A6 COMBINATORIAL ; INPUT
PIN 6 A5 COMBINATORIAL ; INPUT
PIN 7 A4 COMBINATORIAL ; INPUT
PIN 8 A3 COMBINATORIAL ; INPUT
PIN 9 A2 COMBINATORIAL ; INPUT
PIN 10 A1 COMBINATORIAL ; INPUT
PIN 11 IOW COMBINATORIAL ; INPUT
PIN 12 GND
PIN 13 IOR COMBINATORIAL ; INPUT
PIN 14 ACK_HALT COMBINATORIAL ; INPUT
PIN 15 PLS_EN COMBINATORIAL ; OUTPUT
PIN 16 BRDW COMBINATORIAL ; OUTPUT
PIN 17 MOD_CTRL COMBINATORIAL ; OUTPUT
PIN 18 RAM_ACCESS COMBINATORIAL ; OUTPUT
PIN 19 IO_16 COMBINATORIAL ; OUTPUT
PIN 20 LATCH_MOD COMBINATORIAL ; OUTPUT
PIN 21 LATCH_ADD COMBINATORIAL ; OUTPUT
PIN 22 P300 COMBINATORIAL ; OUTPUT
PIN 23 P300IN COMBINATORIAL ; INPUT
PIN 24 VCC
;PC address decoding functions (not all in this PAL)
;uses latched address to provide low-order address lines to pRAM/RAM
; A3 A2 A1 R/W Addr Function
; 0 0 0 R 300 MFF_0
; W not used
; 0 0 1 R 302 MFF_1
; W not used
; 0 1 0 R 304 MFF_2
; W not used
; 0 1 1 R 306 MFF_3
; W Latch Module Number
; 1 0 0 R 308 PLS_Status (pRAM status)
; W PLS_Control (pRAM control)
; 1 0 1 R 30A Weight/Connection-
; W Pointer RAM access
; 1 1 0 R 30C not used
; W Latched RAM address
; 1 1 1 R 30E not used
; W pRAM_256 module control
;
; NB. IO_16 must be tri-stated when not in use
;----------------------------------- Boolean Equation Segment ------
EQUATIONS
/P300 = A9*A8*/A7*/A6*/A5*/A4*/IOR + A9*A8*/A7*/A6*/A5*/A4*/IOW
/BRDW = /P300IN * /IOW
/PLS_EN = /P300IN*/A3*/IOR + /P300IN*A3*/A2*/A1
; MOD_CTRL is active HIGH
MOD_CTRL = ACK_HALT * /BRDW * A3 * A2 * A1 * /IOW
; RAM_ACCESS is active HIGH
RAM_ACCESS = ACK_HALT * /P300IN * A3 * /A2 * A1
IO_16 = GND
IO_16.TRST = /P300IN
; enable 16-bit transfers
; LATCH_MOD is active HIGH
LATCH_MOD = /BRDW * /A3 * A2 * A1
; LATCH_ADD is active HIGH
LATCH_ADD = /BRDW * A3 * A2 * /A1
;----------------------------------- Simulation Segment ------------
SIMULATION
TRACE_ON A9 A8 A7 A6 A5 A4 IOR /IOW /BRDW /PLS_EN MOD_CTRL RAM_ACCESS IO_16 LATCH_MOD LATCH_ADD ACK_HALT /P300 /P300IN
SETF /A9 /A8 /A7 /A6 /A5 /A4 /A3 /A2 /A1 IOR IOW /ACK_HALT /P300IN
SETF /IOW ; test P300 doesn't respond
SETF IOW /IOR ; test P300 doesn't respond
SETF IOR
SETF A9 A8 /A7 /A6 /A5 /A4 /IOR /P300IN
SETF A1
SETF A2 /A1
SETF A1 ; read mff0-3
SETF IOR /IOW ; test P300 and BRDW
SETF /A3 A2 A1 ; test Latch Module No
SETF IOW A3 A2 A1 ; MOD-CTRL not active until ACK_HALT
SETF ACK_HALT /IOW
SETF IOW /ACK_HALT
SETF A3 /A2 A1 ; check RAM_ACCESS
SETF ACK_HALT /IOW
SETF /ACK_HALT IOW
SETF ACK_HALT /IOR ; check READ and WRITE to RAM
SETF IOR P300IN
SETF /A3 A2 A1
SETF /ACK_HALT /P300IN
SETF IOW
SETF /A3 A2 A1 /IOW ; check LATCH_MOD
SETF IOW
SETF A3 A2 /A1
SETF /IOW ; check LATCH_ADD
SETF /A3 /A2 /A1 ; shouldn't happen normally
TRACE_OFF
;-------------------------------------------------------------------
FPGA
Example FPGA code. A solution which is too fancy for my 6502.
I want to make a new clock module using a bare ATmega328 running on a 16mhz crystal. This to provide a clock for my 6502 computer.
Using a display and a rotary encoder I want to create a clock module which generates a 50/50 duty cycle clock 1Hz – 1 MHz.
Input module for my 6502 will be 5 buttons. (For now) that’s what’s left on the VIA on port A. (Rest is used by the display). The display i’m going to place directly on the bus. But I already ordered a second VIA. Matrix keyboard will be next. Then I will use the buttons in the picture for shift/alternate buttons. Because I’ll need about 25 keys. (See other posts) . I’ll probably end up making that one myself.
I found examples like this, rest i have to think of myself
"If something is worth doing, it's worth overdoing."
