Found these old .. old mini-cassettes .. wish i could read these now. The sdk units we had, had tapedrives and few other hardware devices you could play with. Like a motor you could control, which had a disc with slots in it on top. These slots could be read and counted with a sensor to determine the speed.
Also this scanned pages, from school i found. There should also be a little notbook with programs and notes ..
The last days i’ve been selling a lot of my old computers. They have been in my collection for many years, but now its time to part. Time for others to enjoy them.
(Instead of posting which ones are being sold and which i’ve still got on this page i’ll make another post)
I started collecting when i studied computer sciences. It’s a wonder my parents attic wasn’t collapsing. (They let me store many computers on their attic, let me run a mainframe in the house (previous post) and let me have computer-parties (pre-lan) in their home. (They even left, and gave me the space) .. 15+ teens with computers … there was a pingpong table in the livingroom (besides the other tables in the house ) For all computers.
Then i’ve got even more, when living on my own. (At some point about 140. )
A few years later i got rid of uninteresting computers (to my taste at that time) and incomplete ones. Then i filtered-out the non working.
Still leaving with a lot of computers, i kept these for many years.
Now i only want the ones i’ve worked with, or are special to me.
My first computer was a Commodore Vic-20. Friends had the popular C64. So i kept 2 of both. In Junior Technical School i’ve used the BBC Acorn a lot (Funny story below) My then friend Richard had a Atari ST, loads of fun we had with that machine, so i’m keeping a Atari 1040STf. Another friend used a Apple SE, so that one i also keep for now. I’ve been programming a lot on 80×86, the first dos PC’s, i’m still looking for a old machine (Laser XT) which i used way back then. But for now i’ve got a Sinclair PC200. I’ll keep a old Commodore PET 2001, because its cute. Besides having a cute PET, i’ve got a Holborn System. Made in Holland (Enschede), there are only a few left according to some sites: only 200 made! (Holborn means Holland Born) One of the inventors was from Holten, my birthplace. (Polak)
Putting the system together in 2018
At school we kept a list of everyone’s collection.
Soo .. the story about the BBC Acorn.
When i was at school outside study hours, i went to the computer lab. This was one classroom with about 16 BBC Acorns and a master (teacher station). When they saw how enthusiastic i was, i got the key to the classroom. I even got access to the master system. And after a little hacking i’ve gained access to the teachers files. There was a simple network system, i think it was called Econet. The teachers system was the only one with a disk station.
I liked the ‘highres’ line graphics you could make on the machines. (640×256) So i’ve wrote a lot of programs using this mode. I even wrote a program which drew a 3D robotarm on screen using wireframe graphics. At that time my mathematics scores where .. bad. Wasn’t interested i think. But drawing 3D robotic arms are not possible using mathematics, like using sinus, triangulary etcetera. So when my mathematics teacher saw my program, he didn’t believe me. So .. fooling around in the computer lab, i missed start of classes. And later on .. worse .. i almost was not allowed to do my final exams. I was late several times (and one of the first to leave, …. straight from and to the computer lab. )
I’ve got some programs printed on paper, i will use my leftover BBC Acorn (or a emulator) to capture some screen examples.
Sold stuff
UPDATE : Selling a lot, but i’ve bought some others between 2020-2023
SDK-85
Laser Xt/3
80386 DX
Also a “new” 1084 monitor (CRT for a Commodore 64) Now i have to look for a VGA Crt to get old vga-register manipulation programs working.
Above is my Kicad design (reverse engineering print below, which was made for my 6802CPU, which i could use to test the 6822 PIA) The 6822 is simular to 6502 in design. So i’m going to redo this for my 6502. The 7 segment displays are a start of hex-keyboard/display combo i’m going to post more of in the next days.
Below a part of the rom for the LCD dual line display.
Part of the ROM assembly code, top part is text (o.a. japanese)
Started to write routines which i can call to manipulate the display. Setting the pointer to a message, setting the line to use and a subset of controlls like: Center, Right, binary to ascii, scrolling, etcetera
lda #0 ; set line number
sta lineno ; store
jsr gotoline ; goto line in display
lda #<message ; get address from message and store for printline subroutine
sta messagestore
lda #>message
sta messagestore+1
jsr printline ; print
lda #1 ; set line number
sta lineno ; store
jsr gotoline
lda #<message2
sta messagestore
lda #>message2
sta messagestore+1
jsr printline
Above additions: New address decoder Below left the new graphical display, below right a test board which shows address lines and decoded chip-enable lines.
A15 high -> ROM A15 && A14 low -> RAM combination of A15 low and A14 high – A13 and A12 wil select peripherals.
Adress decoding
Start of a wirewrapped version
Above is a start of a wirewrapped version, i also started a PCB design in KIcad that will continuously be changed as i alter designs.
UPDATE SID Working! Using new address decoder.
SID = $7000
makesound:
lda #0
sta SID+$5 ; Channel1 - attack/decay
lda #250
sta SID+$6 ; Channel1 - Sustain/Release
lda #$95
sta SID+$0 ; Channel1 - Frequency low-byte
lda #$44
sta SID+$1 ; Channel1 - Frequency high-byte
lda #%00100001
sta SID+$4 ; SAW + Gate
lda #$0f
sta SID+$18 ; Volume max
Flashing ROMs .. (eeproms). It used to be a pain in the *$$. Burning took a looong time. But clearing one with UV took .. 20 minutes or so. Using one of these:
Altered clock module
Changed button press
Dipswitches for more speed control (red .. upper left)
Changed Rom/Ram
Changed addressing
Added RAM
ZIF Socket for ROM
VIC 6522
Fixed clock
Added buttons for interrupt
Display
Display works now
To test: Create Address logic to access display without VIA Can work, but not at high speed clock. Stays behind VIA
To buy: st7920 lcd 128×64
Generic improvements
Rewired most parts, using color codes (Blue data, Yellow Address and so on)
Added leds on data and address bus using ULN2803 darlington arrays
100nF Decoupling capacitors on the power rails
To do’s or ‘have to look into’s’
For sound i planned to use a General Instrument AY-3-8910, it is somewhere in my Lab, i know it is. I saved this chip and a SID for my Amiga addon soundcard. Where are my plans for the simple v1 setup? (FOUND IT)
I have to start writing rom functions for display usage. Like JSR $ff00 – Clear screen subroutine .. etc
I’m scraping information from websites, to get started on my clock controller. ATmega328 with ssd1306 display and rotary encoder/dip switches
Notes about the movie: Left side is Arduino IDE monitor reading Addressbus and Databus. (I’m going to try to rewrite this to realtime disassemble) Resetting system. Stepping CPU with manual clock pulses. Start vector being read at $FFFC/$FFFD. Program being run from $8000. Set clock on automatic ( ~ about 150 Hz ) Last opcodes you see a JMP loop 4C 2F 80, that is JMP $802F Display enlarged on video, was not visible on movie i took on mobile. (Wrong angle?)
Breadboard overview
Clock module
Reset module + Crystal
CPU + nmi/int buttons
RAM and ROM
Address decode + Bus divide
Addres/Data bus leds
6522 VIA + Display
2nd via + Buttons
?
(sound board)
TIL: 6502 can run without ram only rom,expect when using JSR … which uses a program stack in RAM
Cartridge printEeproms 8k and 32k (also for 6502 project)Eeprom programmer
I’ve got the tools and Bigred made me enthusiastic again. My goal is to make a C64 Cartridge from a PRG. And Not any program, it is the 8085 Emulator from Sepp.
Serveral problems i have to ‘fix’
The program is 17K, Cartridges can only be 16K. So i have to use 2x 8K and compress the data. This means it have to be uncompressed at start time. ( I was thinking of using exomiser for this )
Program starts normally at $0820 and probably is not optimised to run anywhere else. So a starting routine has to copy the program from cartridge memory to the correct location
Luckily i have the source! How cool is that
For version 4.73 it states : Starting at $0820 .. but my hexdump is off by one??!?
00000020 00 20 ec starts with 00 at $0020 .. and not 20 ?!?!
Tools used until now:
Vice – C64 Emulator x64 -cartcrt 8085.crt
c1541 – Linux disk tool for C64 images. Used this to extract the 8085emulator PRG
prg2crt.py – a convertor from PRG to a cartrid file which can be used by Vice python2 prg2crt.py 8085.prg 8085.crt
minipro – eeprom programming tool for Linux minipro -p AT28C64 -w /tmp/test.bin
cartconv (tool from vice to convert crt <-> bin) cartconv -t normal -i test.bin -n ‘my cart’ -o test.crt
xa – Cross assembler 65xx/R65C02/65816
ACME – the ACME Crossassembler for Multiple Environments
Memory Map C64 – source c64-wiki.com
Card Low starts at $8000, so that’s the place where those roms are going to be. To place on this address:
Copy routine : from ($8000 + this copy routine) to $0820 When to decompress?? jmp routine to $0820
A cartridge file >16K and with his emulation headers seems to work??!
Also nice: Magic Desk Cartridge Generator V3.0
UPDATE: 20220811
exomizer sfx 0x0820 8085.prg -o data.exo # Compress and start at 0x0820
xa frame.asm -o frame.bin # Add code and write binary
x64 --cart16 frame.bin # Test cartridge with Vice
frame.asm
;----------------------------------------------------------
; example usage
; xa frame.asm -o frame.bin
; cartconv -t normal -i frame.bin -n 'my cart' -o frame.crt
; x64 -cartcrt frame.crt
;----------------------------------------------------------
;no load-adress for bin-file, so no header here
*=$8000
.word launcher ;cold start
.word launcher ;warm start
.byte $c3 ;c
.byte $c2 ;b
.byte $cd ;m
.byte $38 ;8
.byte $30 ;0
launcher
stx $d016
jsr $fda3 ;prepare irq
jsr $fd50 ;init memory
jsr $fd15 ;init i/o
jsr $ff5b ;init video
;make sure this sets up everything you need,
;the calls above are probably sufficient
ldx #$fb
txs
;set up starting code outside of cartridge-area
move_starter
ldx #(starter_end-starter_start)
loop1
lda starter_start,x
sta $100,x
dex
bpl loop1
jmp $100
;---------------------------------
starter_start
ldx #$40 ;64 pages = 256 * 64 = 16384 Bytes
ldy #0
loop
src
lda exomized_data,y
dst
sta $801,y
iny
bne loop
inc src+2-starter_start+$100
inc dst+2-starter_start+$100
dex
bpl loop
;make sure settings for $01 and IRQ etc are correct for your code
;remember THIS table from AAY64:
; Bit+-------------+-----------+------------+
; 210| $8000-$BFFF |$D000-$DFFF|$E000-$FFFF |
; +---+---+-------------+-----------+------------+
; | 7 |111| Cart.+Basic | I/O | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 6 |110| RAM | I/O | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 5 |101| RAM | I/O | RAM |
; +---+---+-------------+-----------+------------+
; | 4 |100| RAM | RAM | RAM |
; +---+---+-------------+-----------+------------+
; | 3 |011| Cart.+Basic | Char. ROM | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 2 |010| RAM | Char. ROM | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 1 |001| RAM | Char. ROM | RAM |
; +---+---+-------------+-----------+------------+
; | 0 |000| RAM | RAM | RAM |
; +---+---+-------------+-----------+------------+
lda #$35 ;cart is always on instead of BASIC unless it can be switched off via software
sta $01
jmp $80d ;for exomizer, i.e.
starter_end
;----------------------------------
exomized_data
.bin 2,0,"data.exo"
;syntax for exomizer 2.0.1:
;exomizer sfx sys game.prg -o data.exo
main_file_end
;fill up full $4000 bytes for bin file ($c000-$8000=$4000)
.dsb ($c000-main_file_end),0
Exomiser info
Reading "8085.prg", loading from $0801 to $4CE9.
Crunching from $0801 to $4CE9.
Phase 1: Instrumenting file
-----------------------------
Length of indata: 17640 bytes.
[building.directed.acyclic.graph.building.directed.acyclic.graph.]
Instrumenting file, done.
Phase 2: Calculating encoding
-----------------------------
pass 1: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80273.0 bits ~10035 bytes
pass 2: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80039.0 bits ~10005 bytes
pass 3: optimizing ..
Calculating encoding, done.
Phase 3: Generating output file
------------------------------
Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD
Length of crunched data: 10034 bytes.
Crunched data reduced 7606 bytes (43.12%)
Target is self-decrunching C64 executable,
jmp address $0820.
Writing "data.exo" as prg, saving from $0801 to $304C.
Memory layout: |Start |End |
Crunched data | $07E7| $2F18|
Decrunched data | $0801| $4CE9|
Decrunch table | $0334| $03D0|
Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF
Decrunch effect writes to $DBE7.
Decruncher: |Enter |During|Exit |
RAM config | $37| $37| $37|
IRQ enabled | 1| 1| 1|
UPDATE:20230126
; CODE COPY FROM http://www.lemon64.com/forum/viewtopic.php?t=60786&sid=2559442c8b963d7aac27cb13b493f372
; Thanks for posting: Richard of TND
; this is for a 16KB cart, using ACME!!
!to "mycart.crt",cart16crt
scr = $0400
DecrunchADDR = 2061 ;SYS 2061 (HEX $080D)
*=$8000
!word launcher
!word launcher
!byte $c3,$c2,$cd,$38,$30 ;CBM 80
launcher
sei
stx $d016
jsr $fda3 ;prepare irq
jsr $fd50 ;input memory
jsr $fd15 ;initialise i/o
jsr $ff5b ;initialise video memory
;For a more professional boot up. Make
;the border and screen black. AFTER
;the video memory, etc has finished.
lda #$00
sta $d020
sta $d021
cli
;Switch off the screen.
lda $d011
and #%11101111
sta $d011
;Move transfer code over to the screen
;memory.
ldx #$00
tloop lda transfer,x
sta scr,x
inx
bne tloop
jmp scr
transfer
ldx #$00
tr1 lda linkedgame,x ;Move from linked address
sta $0801,x ;Direct to BASIC start address
inx
bne tr1
inc scr+4
inc scr+7
lda scr+4
bne transfer
jsr $e453 ;load basic vectors
jsr $e3bf ;init basic ram
ldx #$fb
txs
;Execute the game, by jumping to the
;de-cruncher's start address.
;jmp $0820
jmp DecrunchADDR
;Link crunched game as a PRG file to memory after
;the cartridge build code.
linkedgame
!bin "8085sys.prg",,2
FileSize = *
!if FileSize >$c000 {
!error "FILE SIZE IS TOO BIG TO FIT 16KB CARTRIDGE"
} else {
*=$c000
}
Exomizer:
exomizer sfx sys 8085.prg -o 8085sys.prg
Reading "8085.prg", loading from $0801 to $4CE9.
Crunching from $0801 to $4CE9.
Phase 1: Instrumenting file
-----------------------------
Length of indata: 17640 bytes.
[building.directed.acyclic.graph.building.directed.acyclic.graph.]
Instrumenting file, done.
Phase 2: Calculating encoding
-----------------------------
pass 1: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80273.0 bits ~10035 bytes
pass 2: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80039.0 bits ~10005 bytes
pass 3: optimizing ..
Calculating encoding, done.
Phase 3: Generating output file
------------------------------
Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD
Length of crunched data: 10034 bytes.
Crunched data reduced 7606 bytes (43.12%)
Target is self-decrunching C64 executable,
jmp address $0820.
Writing "8085sys.prg" as prg, saving from $0801 to $304C.
Memory layout: |Start |End |
Crunched data | $07E7| $2F18|
Decrunched data | $0801| $4CE9|
Decrunch table | $0334| $03D0|
Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF
Decrunch effect writes to $DBE7.
Decruncher: |Enter |During|Exit |
RAM config | $37| $37| $37|
IRQ enabled | 1| 1| 1|
exomizer sfx $\0801 8085.prg -o 8085out.prg
Reading "8085.prg", loading from $0801 to $4CE9.
Crunching from $0801 to $4CE9.
Phase 1: Instrumenting file
-----------------------------
Length of indata: 17640 bytes.
[building.directed.acyclic.graph.building.directed.acyclic.graph.]
Instrumenting file, done.
Phase 2: Calculating encoding
-----------------------------
pass 1: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80273.0 bits ~10035 bytes
pass 2: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80039.0 bits ~10005 bytes
pass 3: optimizing ..
Calculating encoding, done.
Phase 3: Generating output file
------------------------------
Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD
Length of crunched data: 10034 bytes.
Crunched data reduced 7606 bytes (43.12%)
Target is self-decrunching C64 executable,
jmp address $0801.
Writing "8085out.prg" as prg, saving from $0801 to $304C.
Memory layout: |Start |End |
Crunched data | $07E7| $2F18|
Decrunched data | $0801| $4CE9|
Decrunch table | $0334| $03D0|
Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF
Decrunch effect writes to $DBE7.
Decruncher: |Enter |During|Exit |
RAM config | $37| $37| $37|
IRQ enabled | 1| 1| 1|
This looks okay: (monitor in vice)
Attaching crt in vice
Maybe one of these problems:
1) you CAN NOT use BASIC routines when a cart is inserted (without weird tricks, i.e.
storing BASIC routines on cart etc)
2) you need to be careful about $01 as you may map in ROM at $8000 without expecting it.
Please refer to this if in doubt:
http://unusedino.de/ec64/technical/aay/c64/memcfg.html
[3] You should also be careful about the usage of KERNAL routines as some of them
sweep across BASIC-code as well!
After a whole day soldering yesterday, ending up with a wire mess. Which didn’t work at the end…
Starting measuring some things, and create some test sketches (led blinky tests) I found out that the main problem was not having the red switches connected to GND. Blue switches where upside down, this was a easy fix. Because these are ON-ON switches, and where already connected to a common line. Then a mixup between D0 and D6 (wires crossed) And it is working! Made some lines and lettering on the frontplate after some playing around.
The Altair 8800 is a microcomputer designed in 1974 by MITS and based on the Intel 8080CPU. Interest grew quickly after it was featured on the cover of the January 1975 issue of Popular Electronics and was sold by mail order through advertisements there, in Radio-Electronics, and in other hobbyist magazines.
(picture from wikipedia)
UPDATE: 20220804 – Added Octal sheet
I alway loved the simple setup of this computer. There was no screen and no keyboard. Only later additions to the machine provided these.
One explanation of the Altair name, is that the name was inspired by Star Trek episode “Amok Time“, where the Enterprise crew went to Altair (Six).
There are only a few differences between the used 8080 CPU and the 8085 CPU of a machine i learned machinecode on.
See : https://www.henriaanstoot.nl/1989/01/01/8085-machinecode-at-school/
So for a really long time i wanted to have a Altair alike machine. There are do it yourself kits for sale. Which look like perfect relica’s and there are virtual machines and emulators. But i wanted to have the feeling of throwing the switches. You can find a emulator here (https://s2js.com/altair/)
So i bought the components, a poker case which can hold the machine. And started building today.
The backend is a arduino based emulator, but with real leds and switches! (https://create.arduino.cc/projecthub/david-hansel/arduino-altair-8800-simulator-3594a6)
Components and pokercaseDrillingFirst looks
Next to do:
Fix plate into case
Solder a LOT of wires and components!
Shall i get rid off the transitors and use darlington arrays?
Put lettering on the aluminium plate : Functions and Bus information.
Build a power connector in the case
And then … programming 🙂
UPDATE: 20220804 – Added Octal sheet
The Altair is a octal based machine, but i couldn’t find a opcode list in Octal. So i generated one. When entering a MOV D,M instruction for example, you have to enter x 0 1 0 1 0 1 1 0 using the switches Thats 126 in octal but most tables are in hex ( MOV D,M is 56, which is 0101 0110 but not that clear on the switches)
Opcode (oct)
Instruction
function
size
flags
Opcode
000
NOP
1
0x00
001
LXI B,D16
B <- byte 3, C <- byte 2
3
0x01
002
STAX B
(BC) <- A
1
0x02
003
INX B
BC <- BC+1
1
0x03
004
INR B
B <- B+1
1
Z, S, P, AC
0x04
005
DCR B
B <- B-1
1
Z, S, P, AC
0x05
006
MVI B, D8
B <- byte 2
2
0x06
007
RLC
A = A << 1; bit 0 = prev bit 7; CY = prev bit 7
1
CY
0x07
010
–
0x08
011
DAD B
HL = HL + BC
1
CY
0x09
012
LDAX B
A <- (BC)
1
0x0a
013
DCX B
BC = BC-1
1
0x0b
014
INR C
C <- C+1
1
Z, S, P, AC
0x0c
015
DCR C
C <-C-1
1
Z, S, P, AC
0x0d
016
MVI C,D8
C <- byte 2
2
0x0e
017
RRC
A = A >> 1; bit 7 = prev bit 0; CY = prev bit 0
1
CY
0x0f
020
–
0x10
021
LXI D,D16
D <- byte 3, E <- byte 2
3
0x11
022
STAX D
(DE) <- A
1
0x12
023
INX D
DE <- DE + 1
1
0x13
024
INR D
D <- D+1
1
Z, S, P, AC
0x14
025
DCR D
D <- D-1
1
Z, S, P, AC
0x15
026
MVI D, D8
D <- byte 2
2
0x16
027
RAL
A = A << 1; bit 0 = prev CY; CY = prev bit 7
1
CY
0x17
030
–
0x18
031
DAD D
HL = HL + DE
1
CY
0x19
032
LDAX D
A <- (DE)
1
0x1a
033
DCX D
DE = DE-1
1
0x1b
034
INR E
E <-E+1
1
Z, S, P, AC
0x1c
035
DCR E
E <- E-1
1
Z, S, P, AC
0x1d
036
MVI E,D8
E <- byte 2
2
0x1e
037
RAR
A = A >> 1; bit 7 = prev bit 7; CY = prev bit 0
1
CY
0x1f
040
–
0x20
041
LXI H,D16
H <- byte 3, L <- byte 2
3
0x21
042
SHLD adr
(adr) <-L; (adr+1)<-H
3
0x22
043
INX H
HL <- HL + 1
1
0x23
044
INR H
H <- H+1
1
Z, S, P, AC
0x24
045
DCR H
H <- H-1
1
Z, S, P, AC
0x25
046
MVI H,D8
H <- byte 2
2
0x26
047
DAA
special
1
0x27
050
–
0x28
051
DAD H
HL = HL + HI
1
CY
0x29
052
LHLD adr
L <- (adr); H<-(adr+1)
3
0x2a
053
DCX H
HL = HL-1
1
0x2b
054
INR L
L <- L+1
1
Z, S, P, AC
0x2c
055
DCR L
L <- L-1
1
Z, S, P, AC
0x2d
056
MVI L, D8
L <- byte 2
2
0x2e
057
CMA
A <- !A
1
0x2f
060
–
0x30
061
LXI SP, D16
SP.hi <- byte 3, SP.lo <- byte 2
3
0x31
062
STA adr
(adr) <- A
3
0x32
063
INX SP
SP = SP + 1
1
0x33
064
INR M
(HL) <- (HL)+1
1
Z, S, P, AC
0x34
065
DCR M
(HL) <- (HL)-1
1
Z, S, P, AC
0x35
066
MVI M,D8
(HL) <- byte 2
2
0x36
067
STC
CY = 1
1
CY
0x37
070
–
0x38
071
DAD SP
HL = HL + SP
1
CY
0x39
072
LDA adr
A <- (adr)
3
0x3a
073
DCX SP
SP = SP-1
1
0x3b
074
INR A
A <- A+1
1
Z, S, P, AC
0x3c
075
DCR A
A <- A-1
1
Z, S, P, AC
0x3d
076
MVI A,D8
A <- byte 2
2
0x3e
077
CMC
CY=!CY
1
CY
0x3f
100
MOV B,B
B <- B
1
0x40
101
MOV B,C
B <- C
1
0x41
102
MOV B,D
B <- D
1
0x42
103
MOV B,E
B <- E
1
0x43
104
MOV B,H
B <- H
1
0x44
105
MOV B,L
B <- L
1
0x45
106
MOV B,M
B <- (HL)
1
0x46
107
MOV B,A
B <- A
1
0x47
110
MOV C,B
C <- B
1
0x48
111
MOV C,C
C <- C
1
0x49
112
MOV C,D
C <- D
1
0x4a
113
MOV C,E
C <- E
1
0x4b
114
MOV C,H
C <- H
1
0x4c
115
MOV C,L
C <- L
1
0x4d
116
MOV C,M
C <- (HL)
1
0x4e
117
MOV C,A
C <- A
1
0x4f
120
MOV D,B
D <- B
1
0x50
121
MOV D,C
D <- C
1
0x51
122
MOV D,D
D <- D
1
0x52
123
MOV D,E
D <- E
1
0x53
124
MOV D,H
D <- H
1
0x54
125
MOV D,L
D <- L
1
0x55
126
MOV D,M
D <- (HL)
1
0x56
127
MOV D,A
D <- A
1
0x57
130
MOV E,B
E <- B
1
0x58
131
MOV E,C
E <- C
1
0x59
132
MOV E,D
E <- D
1
0x5a
133
MOV E,E
E <- E
1
0x5b
134
MOV E,H
E <- H
1
0x5c
135
MOV E,L
E <- L
1
0x5d
136
MOV E,M
E <- (HL)
1
0x5e
137
MOV E,A
E <- A
1
0x5f
140
MOV H,B
H <- B
1
0x60
141
MOV H,C
H <- C
1
0x61
142
MOV H,D
H <- D
1
0x62
143
MOV H,E
H <- E
1
0x63
144
MOV H,H
H <- H
1
0x64
145
MOV H,L
H <- L
1
0x65
146
MOV H,M
H <- (HL)
1
0x66
147
MOV H,A
H <- A
1
0x67
150
MOV L,B
L <- B
1
0x68
151
MOV L,C
L <- C
1
0x69
152
MOV L,D
L <- D
1
0x6a
153
MOV L,E
L <- E
1
0x6b
154
MOV L,H
L <- H
1
0x6c
155
MOV L,L
L <- L
1
0x6d
156
MOV L,M
L <- (HL)
1
0x6e
157
MOV L,A
L <- A
1
0x6f
160
MOV M,B
(HL) <- B
1
0x70
161
MOV M,C
(HL) <- C
1
0x71
162
MOV M,D
(HL) <- D
1
0x72
163
MOV M,E
(HL) <- E
1
0x73
164
MOV M,H
(HL) <- H
1
0x74
165
MOV M,L
(HL) <- L
1
0x75
166
HLT
special
1
0x76
167
MOV M,A
(HL) <- A
1
0x77
170
MOV A,B
A <- B
1
0x78
171
MOV A,C
A <- C
1
0x79
172
MOV A,D
A <- D
1
0x7a
173
MOV A,E
A <- E
1
0x7b
174
MOV A,H
A <- H
1
0x7c
175
MOV A,L
A <- L
1
0x7d
176
MOV A,M
A <- (HL)
1
0x7e
177
MOV A,A
A <- A
1
0x7f
200
ADD B
A <- A + B
1
Z, S, P, CY, AC
0x80
201
ADD C
A <- A + C
1
Z, S, P, CY, AC
0x81
202
ADD D
A <- A + D
1
Z, S, P, CY, AC
0x82
203
ADD E
A <- A + E
1
Z, S, P, CY, AC
0x83
204
ADD H
A <- A + H
1
Z, S, P, CY, AC
0x84
205
ADD L
A <- A + L
1
Z, S, P, CY, AC
0x85
206
ADD M
A <- A + (HL)
1
Z, S, P, CY, AC
0x86
207
ADD A
A <- A + A
1
Z, S, P, CY, AC
0x87
210
ADC B
A <- A + B + CY
1
Z, S, P, CY, AC
0x88
211
ADC C
A <- A + C + CY
1
Z, S, P, CY, AC
0x89
212
ADC D
A <- A + D + CY
1
Z, S, P, CY, AC
0x8a
213
ADC E
A <- A + E + CY
1
Z, S, P, CY, AC
0x8b
214
ADC H
A <- A + H + CY
1
Z, S, P, CY, AC
0x8c
215
ADC L
A <- A + L + CY
1
Z, S, P, CY, AC
0x8d
216
ADC M
A <- A + (HL) + CY
1
Z, S, P, CY, AC
0x8e
217
ADC A
A <- A + A + CY
1
Z, S, P, CY, AC
0x8f
220
SUB B
A <- A – B
1
Z, S, P, CY, AC
0x90
221
SUB C
A <- A – C
1
Z, S, P, CY, AC
0x91
222
SUB D
A <- A + D
1
Z, S, P, CY, AC
0x92
223
SUB E
A <- A – E
1
Z, S, P, CY, AC
0x93
224
SUB H
A <- A + H
1
Z, S, P, CY, AC
0x94
225
SUB L
A <- A – L
1
Z, S, P, CY, AC
0x95
226
SUB M
A <- A + (HL)
1
Z, S, P, CY, AC
0x96
227
SUB A
A <- A – A
1
Z, S, P, CY, AC
0x97
230
SBB B
A <- A – B – CY
1
Z, S, P, CY, AC
0x98
231
SBB C
A <- A – C – CY
1
Z, S, P, CY, AC
0x99
232
SBB D
A <- A – D – CY
1
Z, S, P, CY, AC
0x9a
233
SBB E
A <- A – E – CY
1
Z, S, P, CY, AC
0x9b
234
SBB H
A <- A – H – CY
1
Z, S, P, CY, AC
0x9c
235
SBB L
A <- A – L – CY
1
Z, S, P, CY, AC
0x9d
236
SBB M
A <- A – (HL) – CY
1
Z, S, P, CY, AC
0x9e
237
SBB A
A <- A – A – CY
1
Z, S, P, CY, AC
0x9f
240
ANA B
A <- A & B
1
Z, S, P, CY, AC
0xa0
241
ANA C
A <- A & C
1
Z, S, P, CY, AC
0xa1
242
ANA D
A <- A & D
1
Z, S, P, CY, AC
0xa2
243
ANA E
A <- A & E
1
Z, S, P, CY, AC
0xa3
244
ANA H
A <- A & H
1
Z, S, P, CY, AC
0xa4
245
ANA L
A <- A & L
1
Z, S, P, CY, AC
0xa5
246
ANA M
A <- A & (HL)
1
Z, S, P, CY, AC
0xa6
247
ANA A
A <- A & A
1
Z, S, P, CY, AC
0xa7
250
XRA B
A <- A ^ B
1
Z, S, P, CY, AC
0xa8
251
XRA C
A <- A ^ C
1
Z, S, P, CY, AC
0xa9
252
XRA D
A <- A ^ D
1
Z, S, P, CY, AC
0xaa
253
XRA E
A <- A ^ E
1
Z, S, P, CY, AC
0xab
254
XRA H
A <- A ^ H
1
Z, S, P, CY, AC
0xac
255
XRA L
A <- A ^ L
1
Z, S, P, CY, AC
0xad
256
XRA M
A <- A ^ (HL)
1
Z, S, P, CY, AC
0xae
257
XRA A
A <- A ^ A
1
Z, S, P, CY, AC
0xaf
260
ORA B
A <- A | B
1
Z, S, P, CY, AC
0xb0
261
ORA C
A <- A | C
1
Z, S, P, CY, AC
0xb1
262
ORA D
A <- A | D
1
Z, S, P, CY, AC
0xb2
263
ORA E
A <- A | E
1
Z, S, P, CY, AC
0xb3
264
ORA H
A <- A | H
1
Z, S, P, CY, AC
0xb4
265
ORA L
A <- A | L
1
Z, S, P, CY, AC
0xb5
266
ORA M
A <- A | (HL)
1
Z, S, P, CY, AC
0xb6
267
ORA A
A <- A | A
1
Z, S, P, CY, AC
0xb7
270
CMP B
A – B
1
Z, S, P, CY, AC
0xb8
271
CMP C
A – C
1
Z, S, P, CY, AC
0xb9
272
CMP D
A – D
1
Z, S, P, CY, AC
0xba
273
CMP E
A – E
1
Z, S, P, CY, AC
0xbb
274
CMP H
A – H
1
Z, S, P, CY, AC
0xbc
275
CMP L
A – L
1
Z, S, P, CY, AC
0xbd
276
CMP M
A – (HL)
1
Z, S, P, CY, AC
0xbe
277
CMP A
A – A
1
Z, S, P, CY, AC
0xbf
300
RNZ
if NZ, RET
1
0xc0
301
POP B
C <- (sp); B <- (sp+1); sp <- sp+2
1
0xc1
302
JNZ adr
if NZ, PC <- adr
3
0xc2
303
JMP adr
PC <= adr
3
0xc3
304
CNZ adr
if NZ, CALL adr
3
0xc4
305
PUSH B
(sp-2)<-C; (sp-1)<-B; sp <- sp – 2
1
0xc5
306
ADI D8
A <- A + byte
2
Z, S, P, CY, AC
0xc6
307
RST 0
CALL $0
1
0xc7
310
RZ
if Z, RET
1
0xc8
311
RET
PC.lo <- (sp); PC.hi<-(sp+1); SP <- SP+2
1
0xc9
312
JZ adr
if Z, PC <- adr
3
0xca
313
–
0xcb
314
CZ adr
if Z, CALL adr
3
0xcc
315
CALL adr
(SP-1)<-PC.hi;(SP-2)<-PC.lo;SP<-SP-2;PC=adr
3
0xcd
316
ACI D8
A <- A + data + CY
2
Z, S, P, CY, AC
0xce
317
RST 1
CALL $8
1
0xcf
320
RNC
if NCY, RET
1
0xd0
321
POP D
E <- (sp); D <- (sp+1); sp <- sp+2
1
0xd1
322
JNC adr
if NCY, PC<-adr
3
0xd2
323
OUT D8
special
2
0xd3
324
CNC adr
if NCY, CALL adr
3
0xd4
325
PUSH D
(sp-2)<-E; (sp-1)<-D; sp <- sp – 2
1
0xd5
326
SUI D8
A <- A – data
2
Z, S, P, CY, AC
0xd6
327
RST 2
CALL $10
1
0xd7
330
RC
if CY, RET
1
0xd8
331
–
0xd9
332
JC adr
if CY, PC<-adr
3
0xda
333
IN D8
special
2
0xdb
334
CC adr
if CY, CALL adr
3
0xdc
335
–
0xdd
336
SBI D8
A <- A – data – CY
2
Z, S, P, CY, AC
0xde
337
RST 3
CALL $18
1
0xdf
340
RPO
if PO, RET
1
0xe0
341
POP H
L <- (sp); H <- (sp+1); sp <- sp+2
1
0xe1
342
JPO adr
if PO, PC <- adr
3
0xe2
343
XTHL
L <-> (SP); H <-> (SP+1)
1
0xe3
344
CPO adr
if PO, CALL adr
3
0xe4
345
PUSH H
(sp-2)<-L; (sp-1)<-H; sp <- sp – 2
1
0xe5
346
ANI D8
A <- A & data
2
Z, S, P, CY, AC
0xe6
347
RST 4
CALL $20
1
0xe7
350
RPE
if PE, RET
1
0xe8
351
PCHL
PC.hi <- H; PC.lo <- L
1
0xe9
352
JPE adr
if PE, PC <- adr
3
0xea
353
XCHG
H <-> D; L <-> E
1
0xeb
354
CPE adr
if PE, CALL adr
3
0xec
355
–
0xed
356
XRI D8
A <- A ^ data
2
Z, S, P, CY, AC
0xee
357
RST 5
CALL $28
1
0xef
360
RP
if P, RET
1
0xf0
361
POP PSW
flags <- (sp); A <- (sp+1); sp <- sp+2
1
0xf1
362
JP adr
if P=1 PC <- adr
3
0xf2
363
DI
special
1
0xf3
364
CP adr
if P, PC <- adr
3
0xf4
365
PUSH PSW
(sp-2)<-flags; (sp-1)<-A; sp <- sp – 2
1
0xf5
366
ORI D8
A <- A | data
2
Z, S, P, CY, AC
0xf6
367
RST 6
CALL $30
1
0xf7
370
RM
if M, RET
1
0xf8
371
SPHL
SP=HL
1
0xf9
372
JM adr
if M, PC <- adr
3
0xfa
373
EI
special
1
0xfb
374
CM adr
if M, CALL adr
3
0xfc
375
–
0xfd
376
CPI D8
A – data
2
Z, S, P, CY, AC
0xfe
377
RST 7
CALL $38
1
0xff
"If something is worth doing, it's worth overdoing."