Added second VIA chip. (For hex keyboard)
Skipped the sound setups with simple components or the Yamaha chip. Straight to the commodore SID chip. Added a amplifier and a speaker.
Added ROM functions for line printing. Picture with 2 lines, and my name in Japanese
Now I have to wait for components. I’ve made a simulation for a address decoder.
Rest I’ve put in previous posts as updates.
Meanwhile testing 6502 apps on Android
From a long time ago
(two examples)
There was a place i’ve worked, they did something weird with network masks.
The cause was probably because of changes in the network, and some things had to be re-routed.
When doing routing you use a network mask, this mask is used in tcp/ip routing. When an IP is not in a local network, which boundaries are set by the mask, the protocol will use the gateway to break out of the network.
Example time!
192.168.1.2 – computer IP
192.168.1.0 – network it sees as local
255.255.255.0 – network mask
192.168.1.1 – gateway of example
in binary
11000000.10101000.00000001.00000010 – computer IP
11000000.10101000.00000001.00000000 – network
11111111.11111111.11111111.00000000 – mask (should be al 1’s until the boundary of the network)
The 1’s in the mask should work as a filter!
What i’ve seen was something like a mask
11111111.1111111.00111111.00000000 !
This gave the network a gap into another network!
This is NOT encouraged, don’t do this.
Theoretical and seen in a real live environment .. it CAN work
Another weird one
I was asked to look into a problem at the Johan Cruyff Foundation.
Btw I ran into the guy, but I didn’t know who he was, they had to explain.
(I ‘m not into football)
Some PC’s sometimes could not connect to the network. Sometimes the printer didn’t work.
A colleague of mine looked into it and could not find it.
So I drove to Amsterdam, turned on a pc, and looked at its network settings.
It was getting a IP, but it was a PUBLIC one!
Looking at another machine, it was also a public one!
The router was locked inside a cabinet, but I knew the famous dutch telecom provider had done something like this! (below)
As it should be (4 ports example)
The organisation had a range of 6 public addresses, thats why not all machines could connect.
These windows pc where connected directly to the internet!
(Some virusscanning required I think!)
For accessing the different components in computers you have to use the Address Bus.
In most 8 bits computers there are 16 address lines.
The CPU on a 6502 can access 65536 addresses (16 bit ). But most chips in the circuit have just a few address lines.
So the chip to use has to be selected using a CE (chip Enable) signal.
Old article i found on my fileserver from 1984
74 Series logic
Above example uses A15 combined with A14 to address the 16K ROM
When using a 32k rom in the upper part of the memory, a15 can be used as CE
The 74ALS133 is a widely used decoder due to it’s many inputs.
Sometimes not all address lines are used for decoding, then you will get a repetition of the device in the memory map.
Above 6522 VIA has only 4 address lines RS0-RS3. But 2 chipselect pins (CS).
If you connect the chip as below.
A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00
CS1 CS2 NC NC NC NC NC NC NC NC NC NC CR3 CR2 CR1 CR0
(NC - not connected, and CS2 is inverted!)The chip would be selected when A15 is 1 and A14 is 0, A13-A04 it would not listen to. So its 4 bits addresses (total 16), would be repeated in a block $8000-$BFFF (10xx xxxx xxxx aaaa) 16384 addresses for 16 addresses on the 6522
ROM
Another simple solution to get a more precise address decoder without using a lot of components is using a ROM.
But this wil only work for low speeds!
A eeprom is relative cheap
PAL PLA GAL
With these devices you can “program” a schematic which works as above example’s of the 74 series. But now you can do it using only one component.
PALs and PLAs are fuse-programmed, some are erasable like (e)eprom.
Below a example of the code.
Most of the PAL/PLA/GAL are hard to get and obsolete
;PALASM Design Description ;---------------------------------- Declaration Segment ------------ TITLE pRAM PC_interface Address Decoder PATTERN pRAM97A.pds REVISION H AUTHOR Trevor Clarkson COMPANY EEE KCL DATE 30/05/97 CHIP decode PALCE20V8 ;---------------------------------- PIN Declarations --------------- PIN 1 AEN COMBINATORIAL ; INPUT PIN 2 A9 COMBINATORIAL ; INPUT PIN 3 A8 COMBINATORIAL ; INPUT PIN 4 A7 COMBINATORIAL ; INPUT PIN 5 A6 COMBINATORIAL ; INPUT PIN 6 A5 COMBINATORIAL ; INPUT PIN 7 A4 COMBINATORIAL ; INPUT PIN 8 A3 COMBINATORIAL ; INPUT PIN 9 A2 COMBINATORIAL ; INPUT PIN 10 A1 COMBINATORIAL ; INPUT PIN 11 IOW COMBINATORIAL ; INPUT PIN 12 GND PIN 13 IOR COMBINATORIAL ; INPUT PIN 14 ACK_HALT COMBINATORIAL ; INPUT PIN 15 PLS_EN COMBINATORIAL ; OUTPUT PIN 16 BRDW COMBINATORIAL ; OUTPUT PIN 17 MOD_CTRL COMBINATORIAL ; OUTPUT PIN 18 RAM_ACCESS COMBINATORIAL ; OUTPUT PIN 19 IO_16 COMBINATORIAL ; OUTPUT PIN 20 LATCH_MOD COMBINATORIAL ; OUTPUT PIN 21 LATCH_ADD COMBINATORIAL ; OUTPUT PIN 22 P300 COMBINATORIAL ; OUTPUT PIN 23 P300IN COMBINATORIAL ; INPUT PIN 24 VCC ;PC address decoding functions (not all in this PAL) ;uses latched address to provide low-order address lines to pRAM/RAM ; A3 A2 A1 R/W Addr Function ; 0 0 0 R 300 MFF_0 ; W not used ; 0 0 1 R 302 MFF_1 ; W not used ; 0 1 0 R 304 MFF_2 ; W not used ; 0 1 1 R 306 MFF_3 ; W Latch Module Number ; 1 0 0 R 308 PLS_Status (pRAM status) ; W PLS_Control (pRAM control) ; 1 0 1 R 30A Weight/Connection- ; W Pointer RAM access ; 1 1 0 R 30C not used ; W Latched RAM address ; 1 1 1 R 30E not used ; W pRAM_256 module control ; ; NB. IO_16 must be tri-stated when not in use ;----------------------------------- Boolean Equation Segment ------ EQUATIONS /P300 = A9*A8*/A7*/A6*/A5*/A4*/IOR + A9*A8*/A7*/A6*/A5*/A4*/IOW /BRDW = /P300IN * /IOW /PLS_EN = /P300IN*/A3*/IOR + /P300IN*A3*/A2*/A1 ; MOD_CTRL is active HIGH MOD_CTRL = ACK_HALT * /BRDW * A3 * A2 * A1 * /IOW ; RAM_ACCESS is active HIGH RAM_ACCESS = ACK_HALT * /P300IN * A3 * /A2 * A1 IO_16 = GND IO_16.TRST = /P300IN ; enable 16-bit transfers ; LATCH_MOD is active HIGH LATCH_MOD = /BRDW * /A3 * A2 * A1 ; LATCH_ADD is active HIGH LATCH_ADD = /BRDW * A3 * A2 * /A1 ;----------------------------------- Simulation Segment ------------ SIMULATION TRACE_ON A9 A8 A7 A6 A5 A4 IOR /IOW /BRDW /PLS_EN MOD_CTRL RAM_ACCESS IO_16 LATCH_MOD LATCH_ADD ACK_HALT /P300 /P300IN SETF /A9 /A8 /A7 /A6 /A5 /A4 /A3 /A2 /A1 IOR IOW /ACK_HALT /P300IN SETF /IOW ; test P300 doesn't respond SETF IOW /IOR ; test P300 doesn't respond SETF IOR SETF A9 A8 /A7 /A6 /A5 /A4 /IOR /P300IN SETF A1 SETF A2 /A1 SETF A1 ; read mff0-3 SETF IOR /IOW ; test P300 and BRDW SETF /A3 A2 A1 ; test Latch Module No SETF IOW A3 A2 A1 ; MOD-CTRL not active until ACK_HALT SETF ACK_HALT /IOW SETF IOW /ACK_HALT SETF A3 /A2 A1 ; check RAM_ACCESS SETF ACK_HALT /IOW SETF /ACK_HALT IOW SETF ACK_HALT /IOR ; check READ and WRITE to RAM SETF IOR P300IN SETF /A3 A2 A1 SETF /ACK_HALT /P300IN SETF IOW SETF /A3 A2 A1 /IOW ; check LATCH_MOD SETF IOW SETF A3 A2 /A1 SETF /IOW ; check LATCH_ADD SETF /A3 /A2 /A1 ; shouldn't happen normally TRACE_OFF ;-------------------------------------------------------------------
FPGA
Example FPGA code. A solution which is too fancy for my 6502.// Verilog code for decoder
// 5-input AND gate
module AND_5_input(g,a,b,c,d,e);
output g;
input a,b,c,d,e;
and #(50) and1(f1,a,b,c,d),
and2(g,f1,e);
endmodule
// fpga4student.com: FPGA projects, Verilog projects, VHDL projects
// Verilog code for decoder
// Decoder top level Verilog code using 5-input AND gates
module dec5to32(Out,Adr);
input [4:0] Adr; // Adr=Address of register
output [31:0] Out;
not #(50) Inv4(Nota, Adr[4]);
not #(50) Inv3(Notb, Adr[3]);
not #(50) Inv2(Notc, Adr[2]);
not #(50) Inv1(Notd, Adr[1]);
not #(50) Inv0(Note, Adr[0]);
AND_5_input a0(Out[0], Nota,Notb,Notc,Notd,Note); // 00000
AND_5_input a1(Out[1], Nota,Notb,Notc,Notd,Adr[0]); // 00001
AND_5_input a2(Out[2], Nota,Notb,Notc,Adr[1],Note); //00010
AND_5_input a3(Out[3], Nota,Notb,Notc,Adr[1],Adr[0]);
AND_5_input a4(Out[4], Nota,Notb,Adr[2],Notd,Note);
AND_5_input a5(Out[5], Nota,Notb,Adr[2],Notd,Adr[0]);
AND_5_input a6(Out[6], Nota,Notb,Adr[2],Adr[1],Note);
AND_5_input a7(Out[7], Nota,Notb,Adr[2],Adr[1],Adr[0]);
AND_5_input a8(Out[8], Nota,Adr[3],Notc,Notd,Note);
AND_5_input a9(Out[9], Nota,Adr[3],Notc,Notd,Adr[0]);
AND_5_input a10(Out[10], Nota,Adr[3],Notc,Adr[1],Note);
AND_5_input a11(Out[11], Nota,Adr[3],Notc,Adr[1],Adr[0]);
AND_5_input a12(Out[12], Nota,Adr[3],Adr[2],Notd,Note);
AND_5_input a13(Out[13], Nota,Adr[3],Adr[2],Notd,Adr[0]);
AND_5_input a14(Out[14], Nota,Adr[3],Adr[2],Adr[1],Note);
AND_5_input a15(Out[15], Nota,Adr[3],Adr[2],Adr[1],Adr[0]);
AND_5_input a16(Out[16], Adr[4],Notb,Notc,Notd,Note);
AND_5_input a17(Out[17], Adr[4],Notb,Notc,Notd,Adr[0]);
AND_5_input a18(Out[18], Adr[4],Notb,Notc,Adr[1],Note);
AND_5_input a19(Out[19], Adr[4],Notb,Notc,Adr[1],Adr[0]);
AND_5_input a20(Out[20], Adr[4],Notb,Adr[2],Notd,Note);
AND_5_input a21(Out[21], Adr[4],Notb,Adr[2],Notd,Adr[0]);
AND_5_input a22(Out[22], Adr[4],Notb,Adr[2],Adr[1],Note);
AND_5_input a23(Out[23], Adr[4],Notb,Adr[2],Adr[1],Adr[0]);
AND_5_input a24(Out[24], Adr[4],Adr[3],Notc,Notd,Note);
AND_5_input a25(Out[25], Adr[4],Adr[3],Notc,Notd,Adr[0]);
AND_5_input a26(Out[26], Adr[4],Adr[3],Notc,Adr[1],Note);
AND_5_input a27(Out[27], Adr[4],Adr[3],Notc,Adr[1],Adr[0]);
AND_5_input a28(Out[28], Adr[4],Adr[3],Adr[2],Notd,Note);
AND_5_input a29(Out[29], Adr[4],Adr[3],Adr[2],Notd,Adr[0]);
AND_5_input a30(Out[30], Adr[4],Adr[3],Adr[2],Adr[1],Note);
AND_5_input a31(Out[31], Adr[4],Adr[3],Adr[2],Adr[1],Adr[0]); // 11111
endmodule
Example of Ice studio FPGA programming
Conslusion:
For now i will use the 74 logic. But i definitely will revisit FPGA’s
Another good suggestion by Bigred.
We are all getting older and electronics smaller. It’s hard to see if your soldering blobs are okay!
Those blobs can reflect the light in a way that it’s not visible anymore to check them.
So i took Bigreds advice, and bought a G1200 Microscope.
It’s a cheap but helpfull little gadget.
Below some examples:
SDCard Access:
Access to the sdcard is a little hard. Connecting via Mass Storage is a solution. But i’ve put a little piece of tape to get the card in or out of the slot.
You can view the recordings on the Microscope itself. So i was wondering, can it play any other movie files?
I placed different MOV files on the sdcard, but the microscope skipped the ones i places on the sdcard myself.
I started to look at the metadata, and saw a Codec ID
“qt 2016.04.21 (qt )”
mediainfo VID_001.MOV General Complete name : VID_001.MOV Format : MPEG-4 Format profile : QuickTime Codec ID : qt 2016.04.21 (qt ) File size : 551 MiB Duration : 12s 0ms Overall bit rate : 385 Mbps Encoded date : UTC 1904-01-01 00:00:00 Tagged date : UTC 1904-01-01 00:00:00 Video ID : 1 Format : AVC Format/Info : Advanced Video Codec Format profile : Main@L4.1 Format settings, CABAC : Yes Format settings, ReFrames : 1 frame Codec ID : avc1 Codec ID/Info : Advanced Video Coding Duration : 12s 0ms Source duration : 12s 360ms Bit rate : 14.5 Mbps Width : 1 920 pixels Height : 1 080 pixels Display aspect ratio : 16:9 Frame rate mode : Constant Frame rate : 25.000 fps Color space : YUV Chroma subsampling : 4:2:0 Bit depth : 8 bits Scan type : Progressive Bits/(Pixel*Frame) : 0.280 Stream size : 20.8 MiB (4%) Source stream size : 21.3 MiB (4%) Language : 33 Encoded date : UTC 1904-01-01 00:00:00 Tagged date : UTC 1904-01-01 00:00:00 mdhd_Duration : 12000 Audio ID : 2 Format : PCM Format settings, Endianness : Little Format settings, Sign : Signed Codec ID : sowt Duration : 12s 0ms Source duration : 12s 288ms Bit rate mode : Constant Bit rate : 128 Kbps Channel(s) : 1 channel Channel positions : Front: C Sampling rate : 8 000 Hz Bit depth : 16 bits Stream size : 188 KiB (0%) Source stream size : 192 KiB (0%) Language : 33 Default : Yes Alternate group : 1 Encoded date : UTC 1904-01-01 00:00:00 Tagged date : UTC 1904-01-01 00:00:00
Tried to change this with ffmpeg, but it would not change the way i want.
ffmpeg -i VID_002.MOV -c copy -map 0 -brand 'qt 2016.04.21 (qt )' VID_007.MOV mediainfo VID_007.MOV General Complete name : VID_007.MOV Format : MPEG-4 Format profile : QuickTime Codec ID : qt 0000.02 (qt ) <--------------- nope
Header of the movie clip
maybe i have to look into this … later
00000000 00 00 00 14 66 74 79 70 71 74 20 20 20 16 04 21 |....ftypqt ..!| 00000010 71 74 20 20 00 00 00 08 77 69 64 65 01 57 c7 e4 |qt ....wide.W..| 00000020 6d 64 61 74 00 00 01 d8 0c 00 00 00 4a 4b 4c 4a |mdat........JKLJ| 00000030 19 00 00 00 80 07 00 00 38 04 00 00 01 00 00 00 |........8.......| 00000040 10 00 00 00 40 1f 00 00 00 20 00 00 01 00 00 00 |....@.... ......| 00000050 0c 00 00 00 73 6f 77 74 00 02 00 00 00 00 00 00 |....sowt........| 00000060 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
Started to write a program to generate a memory map like this
It will be a python script which generates a ascii table.
| a15 | a14 | a13 | a12 | a11 | a10 | a09 | a08 | a07 | a06 | a05 | a04 | a03 | a02 | a01 | a00 | | 1 | a | a | a | a | a | a | a | a | a | a | a | a | a | a | a | ROM | 0 | 0 | a | a | a | a | a | a | a | a | a | a | a | a | a | a | RAM | 0 | 1 | 1 | x | x | x | x | x | x | x | x | x | a | a | a | a | VIA | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | a | a | a | a | a | a | a | a | PS
Above example shows:
Generated output
| 0000 | ram | | | | |
| 00ff | ram | | | | |
| 0100 | ram | | ps | | |
| 01ff | ram | | ps | | |
| 0200 | ram | | | | |
| 3fff | ram | | | | |
| 4000 | | | | | |
| 5fff | | | | | |
| 6000 | | | | via1 | |
| 6fff | | | | via1 | |
| 7000 | | | | | via2 |
| 7fff | | | | | via2 |
| 8000 | | rom | | | |
| ffff | | rom | | | |
#!/bin/python
# 0 = address should be 0 .. Duh
# 1 = address should be 1 .. Duh
# a = address 0 or 1
# x = not connected, future function
# try
#via1 = ["0","1","1","0","x","x","x","x","x","x","0","x","a","a","a","a"]
rom = ["1","a","a","a","a","a","a","a","a","a","a","a","a","a","a","a"]
ram = ["0","0","a","a","a","a","a","a","a","a","a","a","a","a","a","a"]
via1 = ["0","1","1","0","x","x","x","x","x","x","x","x","a","a","a","a"]
via2 = ["0","1","1","1","x","x","x","x","x","x","x","x","a","a","a","a"]
ps = ["0","0","0","0","0","0","0","1","a","a","a","a","a","a","a","a"]
counter = 0
prevhexw = f"{0:04x}"
prevram = "nix"
prevrom = "nix"
prevps = "nix"
prevvia1 = "nix"
prevvia2 = "nix"
while counter < 65536:
binw = f"{counter:016b}"
hexw = f"{counter:04x}"
binint = bin(int(counter))
address=0
ramcheck=0
romcheck=0
pscheck=0
via1check=0
via2check=0
printram = " "
printrom = " "
printps = " "
printvia1 = " "
printvia2 = " "
myram=ram.copy()
myrom=rom.copy()
myps=ps.copy()
myvia1=via1.copy()
myvia2=via2.copy()
while address < 16:
if myram[address] == "a":
myram[address]=binw[address]
if myram[address] == "x":
myram[address]=binw[address]
if myram[address] != binw[address]:
ramcheck=1
if myrom[address] == "a":
myrom[address]=binw[address]
if myrom[address] == "x":
myrom[address]=binw[address]
if myrom[address] != binw[address]:
romcheck=1
if myps[address] == "a":
myps[address]=binw[address]
if myps[address] == "x":
myps[address]=binw[address]
if myps[address] != binw[address]:
pscheck=1
if myvia1[address] == "a":
myvia1[address]=binw[address]
if myvia1[address] == "x":
myvia1[address]=binw[address]
if myvia1[address] != binw[address]:
via1check=1
if myvia2[address] == "a":
myvia2[address]=binw[address]
if myvia2[address] == "x":
myvia2[address]=binw[address]
if myvia2[address] != binw[address]:
via2check=1
address=address+1
if ramcheck==0:
printram="ram"
if romcheck==0:
printrom="rom"
if pscheck==0:
printps="ps "
if via1check==0:
printvia1="via1"
if via2check==0:
printvia2="via2"
if prevram != printram or prevrom != printrom or prevps != printps or prevvia1 != printvia1 or prevvia2 != printvia2:
printlinep = f"| {prevhexw} | {prevram} | {prevrom} | {prevps} | {prevvia1} | {prevvia2} |"
printline = f"| {hexw} | {printram} | {printrom} | {printps} | {printvia1} | {printvia2} |"
if prevram != "nix":
print(printlinep)
print(printline)
prevram=printram
prevrom=printrom
prevps=printps
prevvia1=printvia1
prevvia2=printvia2
prevhexw=hexw
counter=counter+1;
printline = f"| {hexw} | {printram} | {printrom} | {printps} | {printvia1} | {printvia2} |"
print(printline)
Searching for parts .. from other projects
I want to make a new clock module using a bare ATmega328 running on a 16mhz crystal. This to provide a clock for my 6502 computer.
Using a display and a rotary encoder I want to create a clock module which generates a 50/50 duty cycle clock 1Hz – 1 MHz.
Input module for my 6502 will be 5 buttons. (For now) that’s what’s left on the VIA on port A. (Rest is used by the display). The display i’m going to place directly on the bus. But I already ordered a second VIA. Matrix keyboard will be next. Then I will use the buttons in the picture for shift/alternate buttons. Because I’ll need about 25 keys. (See other posts) . I’ll probably end up making that one myself.
python mch2022-tools/webusb_fat_dir.py /flash/apps/python/easy for f in easy.mp3 easy.png icon.png __init__.py ; do python mch2022-tools/webusb_fat_push.py $f /flash/apps/python/easy/$f ; done
Micropython code __init__.py
mport display
import mch22
from audio import play
import buttons
from time import sleep
from machine import Pin
from neopixel import NeoPixel
powerPin = Pin(19, Pin.OUT)
dataPin = Pin(5, Pin.OUT)
np = NeoPixel(dataPin, 5)
powerPin.on()
def on_home_btn(pressed):
if pressed:
mch22.exit_python()
display.drawPng(0,0,"/apps/python/easy/easy.png")
display.flush()
# Led setup
# 2 3
# 1
# 0 4
np[0] = (23,5,15)
np[1] = (3,15,22)
np[2] = (25,24,1)
np[3] = (25,24,1)
np[4] = (23,4,15)
np.write()
buttons.attach(buttons.BTN_HOME, on_home_btn)
# playing with volume 0 to wakeup sound device, else it is going to clip
play('/apps/python/easy/easy.mp3', volume=0)
sleep(7)
while True:
play('/apps/python/easy/easy.mp3', volume=100)
sleep(30)
The lost ancient art of wire wrapping.
{funny story]
In 2019 i wanted to make a simple probe, which could detect 0 or 1 or a pulse. I wanted to make this on a little print using wirewrap wires and IC sockets. (I still have the tool which i used in the 90s.)
When going to a well-known electronics shop in Den Hague. A great shop to get all kinds of oldskool electronics. But i’m getting ahead of the story.
This shop has a lot of components for all kinds of electronics. New and what it looked like de-soldered component from boards or bought from old going-out-of-business shops or factories. Stuff you needed for 60s equipment.
Well i was at the counter, asking a old guy.
“Do you have wire-wrap wire”
He said: ” No that’s old skool” ….
{/funny story]
The wirewrap tool has a cable stripper. After stripping you would put a short part in the tool, place the tool over a IC pin and turning would wrap the wire on the pins.
You could stack multiple connections on one pin.
Removing could be done by turning the tool counterclockwise.
Sometimes you had to remove the one closest to the print, replacing all wires. (Or cut the wrong/not needed wire and leave it in place … )
I’m thinking of moving my breadboard 6502 to a wirewrapped version.
All my old boards are gone .. before i got a digital camera .. 🙁
Example from a 8031 setup of a friend of mine
UPDATE: 20220815, 20220814, 20220815, 20230202
Flashing ROMs .. (eeproms). It used to be a pain in the *$$.
Burning took a looong time. But clearing one with UV took .. 20 minutes or so. Using one of these:
Altered clock module
Changed Rom/Ram
VIC 6522
Display
Generic improvements
To do’s or ‘have to look into’s’
Notes about the movie:
Left side is Arduino IDE monitor reading Addressbus and Databus.
(I’m going to try to rewrite this to realtime disassemble)
Resetting system.
Stepping CPU with manual clock pulses.
Start vector being read at $FFFC/$FFFD.
Program being run from $8000.
Set clock on automatic ( ~ about 150 Hz )
Last opcodes you see a JMP loop 4C 2F 80, that is JMP $802F
Display enlarged on video, was not visible on movie i took on mobile.
(Wrong angle?)
Breadboard overview
| Clock module | Reset module + Crystal |
| CPU + nmi/int buttons | RAM and ROM |
| Address decode + Bus divide | Addres/Data bus leds |
| 6522 VIA + Display | 2nd via + Buttons |
| ? | (sound board) |
TIL: 6502 can run without ram only rom,expect when using JSR … which uses a program stack in RAM
TODO:
I’ve got the tools and Bigred made me enthusiastic again.
My goal is to make a C64 Cartridge from a PRG. And Not any program, it is the 8085 Emulator from Sepp.
Serveral problems i have to ‘fix’
Luckily i have the source! How cool is that
For version 4.73 it states : Starting at $0820 .. but my hexdump is off by one??!?
root@battlestation:/home/fash/Projects/minipro# hexdump -C /tmp/8085.prg | head 00000000 01 08 1e 08 c5 07 9e 32 30 38 30 20 42 59 20 4d |.......2080 BY M| 00000010 41 52 54 49 4e 20 4d 45 59 45 52 49 4e 4b 00 00 |ARTIN MEYERINK..| 00000020 00 20 ec 08 20 7f 19 20 2b 2c 20 11 19 20 b8 08 |. .. .. +, .. ..| 00000030 20 20 2c 20 a0 2c 20 f2 2c 20 11 e1 4c 00 15 aa | , ., ., ..L...| 00000040 aa a2 06 ad b7 08 9d 48 d8 bd 48 04 20 88 39 9d |.......H..H. .9.| 00000050 48 04 ca 10 ee a9 60 8d 4c 04 4c 50 47 00 a9 d0 |H.....`.L.LPG...| 00000060 2c a9 f0 8d 45 1f 4c 11 e1 1e 93 0d 20 20 4d 41 |,...E.L..... MA| 00000070 52 54 49 4e 20 4d 45 59 45 52 49 4e 4b 27 53 0d |RTIN MEYERINK'S.| 00000080 0d 20 38 30 38 35 20 45 4d 55 4c 41 54 4f 52 20 |. 8085 EMULATOR | 00000090 20 56 34 2e 38 30 0d 0d 20 20 28 43 29 20 31 20 | V4.80.. (C) 1 |
00000020 00 20 ec starts with 00 at $0020 .. and not 20 ?!?!
Tools used until now:
Card Low starts at $8000, so that’s the place where those roms are going to be.
To place on this address:
Copy routine : from ($8000 + this copy routine) to $0820
When to decompress??
jmp routine to $0820
Also nice: Magic Desk Cartridge Generator V3.0
UPDATE: 20220811
exomizer sfx 0x0820 8085.prg -o data.exo # Compress and start at 0x0820 xa frame.asm -o frame.bin # Add code and write binary x64 --cart16 frame.bin # Test cartridge with Vice
frame.asm
;----------------------------------------------------------
; example usage
; xa frame.asm -o frame.bin
; cartconv -t normal -i frame.bin -n 'my cart' -o frame.crt
; x64 -cartcrt frame.crt
;----------------------------------------------------------
;no load-adress for bin-file, so no header here
*=$8000
.word launcher ;cold start
.word launcher ;warm start
.byte $c3 ;c
.byte $c2 ;b
.byte $cd ;m
.byte $38 ;8
.byte $30 ;0
launcher
stx $d016
jsr $fda3 ;prepare irq
jsr $fd50 ;init memory
jsr $fd15 ;init i/o
jsr $ff5b ;init video
;make sure this sets up everything you need,
;the calls above are probably sufficient
ldx #$fb
txs
;set up starting code outside of cartridge-area
move_starter
ldx #(starter_end-starter_start)
loop1
lda starter_start,x
sta $100,x
dex
bpl loop1
jmp $100
;---------------------------------
starter_start
ldx #$40 ;64 pages = 256 * 64 = 16384 Bytes
ldy #0
loop
src
lda exomized_data,y
dst
sta $801,y
iny
bne loop
inc src+2-starter_start+$100
inc dst+2-starter_start+$100
dex
bpl loop
;make sure settings for $01 and IRQ etc are correct for your code
;remember THIS table from AAY64:
; Bit+-------------+-----------+------------+
; 210| $8000-$BFFF |$D000-$DFFF|$E000-$FFFF |
; +---+---+-------------+-----------+------------+
; | 7 |111| Cart.+Basic | I/O | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 6 |110| RAM | I/O | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 5 |101| RAM | I/O | RAM |
; +---+---+-------------+-----------+------------+
; | 4 |100| RAM | RAM | RAM |
; +---+---+-------------+-----------+------------+
; | 3 |011| Cart.+Basic | Char. ROM | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 2 |010| RAM | Char. ROM | Kernal ROM |
; +---+---+-------------+-----------+------------+
; | 1 |001| RAM | Char. ROM | RAM |
; +---+---+-------------+-----------+------------+
; | 0 |000| RAM | RAM | RAM |
; +---+---+-------------+-----------+------------+
lda #$35 ;cart is always on instead of BASIC unless it can be switched off via software
sta $01
jmp $80d ;for exomizer, i.e.
starter_end
;----------------------------------
exomized_data
.bin 2,0,"data.exo"
;syntax for exomizer 2.0.1:
;exomizer sfx sys game.prg -o data.exo
main_file_end
;fill up full $4000 bytes for bin file ($c000-$8000=$4000)
.dsb ($c000-main_file_end),0
Exomiser info
Reading "8085.prg", loading from $0801 to $4CE9.
Crunching from $0801 to $4CE9.
Phase 1: Instrumenting file
-----------------------------
Length of indata: 17640 bytes.
[building.directed.acyclic.graph.building.directed.acyclic.graph.]
Instrumenting file, done.
Phase 2: Calculating encoding
-----------------------------
pass 1: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80273.0 bits ~10035 bytes
pass 2: optimizing ..
[finding.shortest.path.finding.shortest.path.finding.shortest.pat]
size 80039.0 bits ~10005 bytes
pass 3: optimizing ..
Calculating encoding, done.
Phase 3: Generating output file
------------------------------
Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD
Length of crunched data: 10034 bytes.
Crunched data reduced 7606 bytes (43.12%)
Target is self-decrunching C64 executable,
jmp address $0820.
Writing "data.exo" as prg, saving from $0801 to $304C.
Memory layout: |Start |End |
Crunched data | $07E7| $2F18|
Decrunched data | $0801| $4CE9|
Decrunch table | $0334| $03D0|
Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF
Decrunch effect writes to $DBE7.
Decruncher: |Enter |During|Exit |
RAM config | $37| $37| $37|
IRQ enabled | 1| 1| 1|
UPDATE:20230126
; CODE COPY FROM http://www.lemon64.com/forum/viewtopic.php?t=60786&sid=2559442c8b963d7aac27cb13b493f372
; Thanks for posting: Richard of TND
; this is for a 16KB cart, using ACME!!
!to "mycart.crt",cart16crt
scr = $0400
DecrunchADDR = 2061 ;SYS 2061 (HEX $080D)
*=$8000
!word launcher
!word launcher
!byte $c3,$c2,$cd,$38,$30 ;CBM 80
launcher
sei
stx $d016
jsr $fda3 ;prepare irq
jsr $fd50 ;input memory
jsr $fd15 ;initialise i/o
jsr $ff5b ;initialise video memory
;For a more professional boot up. Make
;the border and screen black. AFTER
;the video memory, etc has finished.
lda #$00
sta $d020
sta $d021
cli
;Switch off the screen.
lda $d011
and #%11101111
sta $d011
;Move transfer code over to the screen
;memory.
ldx #$00
tloop lda transfer,x
sta scr,x
inx
bne tloop
jmp scr
transfer
ldx #$00
tr1 lda linkedgame,x ;Move from linked address
sta $0801,x ;Direct to BASIC start address
inx
bne tr1
inc scr+4
inc scr+7
lda scr+4
bne transfer
jsr $e453 ;load basic vectors
jsr $e3bf ;init basic ram
ldx #$fb
txs
;Execute the game, by jumping to the
;de-cruncher's start address.
;jmp $0820
jmp DecrunchADDR
;Link crunched game as a PRG file to memory after
;the cartridge build code.
linkedgame
!bin "8085sys.prg",,2
FileSize = *
!if FileSize >$c000 {
!error "FILE SIZE IS TOO BIG TO FIT 16KB CARTRIDGE"
} else {
*=$c000
}
Exomizer:
exomizer sfx sys 8085.prg -o 8085sys.prg Reading "8085.prg", loading from $0801 to $4CE9. Crunching from $0801 to $4CE9. Phase 1: Instrumenting file ----------------------------- Length of indata: 17640 bytes. [building.directed.acyclic.graph.building.directed.acyclic.graph.] Instrumenting file, done. Phase 2: Calculating encoding ----------------------------- pass 1: optimizing .. [finding.shortest.path.finding.shortest.path.finding.shortest.pat] size 80273.0 bits ~10035 bytes pass 2: optimizing .. [finding.shortest.path.finding.shortest.path.finding.shortest.pat] size 80039.0 bits ~10005 bytes pass 3: optimizing .. Calculating encoding, done. Phase 3: Generating output file ------------------------------ Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD Length of crunched data: 10034 bytes. Crunched data reduced 7606 bytes (43.12%) Target is self-decrunching C64 executable, jmp address $0820. Writing "8085sys.prg" as prg, saving from $0801 to $304C. Memory layout: |Start |End | Crunched data | $07E7| $2F18| Decrunched data | $0801| $4CE9| Decrunch table | $0334| $03D0| Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF Decrunch effect writes to $DBE7. Decruncher: |Enter |During|Exit | RAM config | $37| $37| $37| IRQ enabled | 1| 1| 1|
exomizer sfx $\0801 8085.prg -o 8085out.prg Reading "8085.prg", loading from $0801 to $4CE9. Crunching from $0801 to $4CE9. Phase 1: Instrumenting file ----------------------------- Length of indata: 17640 bytes. [building.directed.acyclic.graph.building.directed.acyclic.graph.] Instrumenting file, done. Phase 2: Calculating encoding ----------------------------- pass 1: optimizing .. [finding.shortest.path.finding.shortest.path.finding.shortest.pat] size 80273.0 bits ~10035 bytes pass 2: optimizing .. [finding.shortest.path.finding.shortest.path.finding.shortest.pat] size 80039.0 bits ~10005 bytes pass 3: optimizing .. Calculating encoding, done. Phase 3: Generating output file ------------------------------ Encoding: 1101112133423160,1122,2010223445667788,032144406789BBCD Length of crunched data: 10034 bytes. Crunched data reduced 7606 bytes (43.12%) Target is self-decrunching C64 executable, jmp address $0801. Writing "8085out.prg" as prg, saving from $0801 to $304C. Memory layout: |Start |End | Crunched data | $07E7| $2F18| Decrunched data | $0801| $4CE9| Decrunch table | $0334| $03D0| Decruncher | $00FD| $01C0| and $9F,$A7,$AE,$AF Decrunch effect writes to $DBE7. Decruncher: |Enter |During|Exit | RAM config | $37| $37| $37| IRQ enabled | 1| 1| 1|
This looks okay: (monitor in vice)
Attaching crt in vice
Maybe one of these problems:
1) you CAN NOT use BASIC routines when a cart is inserted (without weird tricks, i.e.
storing BASIC routines on cart etc)
2) you need to be careful about $01 as you may map in ROM at $8000 without expecting it.
Please refer to this if in doubt:
http://unusedino.de/ec64/technical/aay/c64/memcfg.html
[3] You should also be careful about the usage of KERNAL routines as some of them
sweep across BASIC-code as well!